Analog circuit for synapse neural networks VLSI implementation

Author

Chible, Hussein

Author_Institution

Lebanese Univ., Beirut, Lebanon

Volume

2

fYear

2000

fDate

2000

Firstpage

1004

Abstract

In this paper the author presents an analog VLSI circuit to implement the synapse operation in artificial neural network systems. This circuit is a two-quadrant (or four-quadrant) analog multiplier. The output of the synapse circuit is in current and it is proportional to the multiplication of two input voltages: the weight voltage and the pattern information input voltage (or the output voltage of the neuron). The main feature of the multiplier is the high value of the weight voltage range, which varies between the ground voltage and the supply voltage [0:Vdd]

Keywords

CMOS analogue integrated circuits; VLSI; analogue processing circuits; neural chips; 0.5 micron; Mietec CMOS technology; VLSI implementation; analog VLSI circuit; artificial neural network systems; four-quadrant analog multiplier; pattern information input voltage; synapse neural networks; two-quadrant analog multiplier; weight voltage; Analog circuits; Capacitors; Cities and towns; Equations; Neural networks; Neurons; Resistors; Threshold voltage; Transconductance; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on

Conference_Location

Jounieh

Print_ISBN

0-7803-6542-9

Type

conf

DOI

10.1109/ICECS.2000.913045

Filename

913045