Title :
New proposed adhesive tape application mechanism for stacking die applications
Author :
Cheung, Y.M. ; Chong, Arthur C M
Author_Institution :
ASM Assembly Autom. Ltd, Kowloon, China
Abstract :
One approach to develop a high-density electronic package for memory modules is stacking the dice in the packaging and assembly processes. The development of the stacked die has been speeded up significantly in recent years by the maturity of the wafer thinning technology. Conventionally, if the top die and bottom dice are the same size, a dummy silicon die is used as a spacer to separate the dice and make room for wire bonding. Methods including using a much thicker epoxy or epoxy with spacer balls would be the alternative techniques. A new technique has been developed recently. A thick adhesive tape of size a bit smaller than the die is used as spacer as well as adhesive for the bonding of the bottom and top dice. This new process, known as adhesive tape application process, is introduced for stacking the dice. In the process, a predetermined tape size is cut, picked and placed on the top surface of the bottom die or substrate. The advantages of this technique over the dispensing process are (i) there is no die tilt and (ii) there are no epoxy bleed out issues. However, there may be new issues, such as delamination failure that occurs at the bonding interface. In this study, we find that void formation due to trapped air in the bonding interface is introduced by the tape application process while a collet with flat surface is used to place the tape on the bottom die or substrate. The uneven contact points between tape and bonding surface trap air bubbles in the bonding interface. We invent a new tape application tool that can basically eliminate trapped air bubbles during the tape bonding process. A convex compliant collet is used to pickup and place the tape on the bonding surface: The line contact between tape and bonding surface is formed in the middle of the tape. The air is not trapped in the bonding interface as the collet moves further down to deform the collet and squeeze the tape out sideways. Finite element simulation has been carried out to determine t- e optimized configuration in terms of force requirements to flatten the convex collet, strain/stress distribution of the compliant collet and the tape itself. Selection criteria of this compliant material for the tape application process are also discussed. Experiments have been carried out to verify the void-free condition is achieved using this new convex compliant collet.
Keywords :
adhesive bonding; adhesives; bubbles; delamination; dielectric thin films; failure analysis; finite element analysis; integrated circuit packaging; integrated memory circuits; microassembling; semiconductor process modelling; stress-strain relations; voids (solid); adhesive; adhesive tape application mechanism; bonding interface; bonding surface; convex compliant collet; delamination failure; die bonding; die tilt; dummy silicon die spacer; epoxy bleed out; epoxy thickness; finite element simulation; flat collet surface; force requirements; high-density electronic package; memory modules; optimized configuration; packaging assembly processes; spacer balls; stacking die applications; strain/stress distribution; tape application process; tape application tool; tape-bonding surface line contact; thick adhesive tape size; trapped air; uneven contact points; void formation; void-free condition; wafer thinning technology; wire bonding; Assembly; Bonding processes; Delamination; Electronics packaging; Finite element methods; Silicon; Space technology; Stacking; Wafer bonding; Wire;
Conference_Titel :
Electronic Packaging Technology Proceedings, 2003. ICEPT 2003. Fifth International Conference on
Conference_Location :
Shanghai, China
Print_ISBN :
0-7803-8168-8
DOI :
10.1109/EPTC.2003.1298748