Title :
A hierarchical circuit extractor based on new cell overlap analysis
Author :
Sawada, Hirotoshi
Abstract :
An algorithm is presented for cell overlap analysis. With the hierarchical operations set introduced, any type of cell overlap can be mapped into each subcell. The cell abstract is automatically defined without any technology dependent descriptions and the hierarchical structure can be preserved. The algorithm is implemented in a hierarchical circuit extractor called HIPAS. This system can be used for a full chip with more than 200000 transistors.<>
Keywords :
VLSI; circuit layout CAD; HIPAS; cell overlap analysis; hierarchical circuit extractor; hierarchical operations set; Algorithm design and analysis; Circuits; Data mining; Geometry; Joining processes; Laboratories; Large scale integration; Very large scale integration;
Conference_Titel :
Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2055-2
DOI :
10.1109/ICCAD.1990.129891
