Title :
A global optimization approach for architectural synthesis
Author :
Gebotys, Catherine H. ; Elmasry, Mohamed I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
A relaxed LP model, which simultaneously schedules and allocates functional units and registers, is presented for synthesizing cost-constrained globally optimal architectures. A mathematical integer programming formulation of the architectural synthesis problem was transformed into the node packing problem. Some integral facets of this polytope were extracted and generalized to produce integral solutions using the simplex algorithm without the need to branch and bound. Execution times are faster by an order of magnitude than previous research which makes use of heuristic techniques. This research breaks ground by simultaneously scheduling and allocating with practical execution times; guaranteeing globally optimal solutions for a specific objective function; and providing a polynomial runtime algorithm for solving this NP-complete problem.<>
Keywords :
VLSI; circuit CAD; computability; computational complexity; integer programming; optimisation; NP-complete problem; VLSI design; allocation; architectural synthesis; cost-constrained globally optimal architectures; mathematical integer programming; node packing; polynomial runtime algorithm; relaxed LP model; scheduling; simplex algorithm; Computer architecture; Cost function; Integral equations; Job shop scheduling; Linear programming; Piecewise linear techniques; Processor scheduling; Registers; Scholarships; Synthesizers;
Conference_Titel :
Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2055-2
DOI :
10.1109/ICCAD.1990.129896