Title :
A novel high-speed BiCMOS domino logic family
Author :
Menon, Sankaran M. ; Jayasumana, Anura P. ; Malaiya, Yashwant K.
Author_Institution :
Dept. of Electr. & Comput. Eng., South Dakota Sch. of Mines & Technol., Rapid City, SD, USA
fDate :
30 Apr-3 May 1995
Abstract :
A new BiCMOS dynamic logic family is presented. The logic gates provide a significant speed-up over existing logic families, such as, CMOS, BiCMOS and dynamic CMOS for the same feature size. The proposed logic family provides high drive capability to drive large loads at higher speeds compared to CMOS domino logic family; there are power advantages due to dynamic operation compared to the conventional fully complementary CMOS and BiCMOS devices. It also has area advantage compared to that of the conventional BiCMOS gates. The proposed high-speed BiCMOS domino family provides speed improvement with existing feature size, using the existing fabrication technology
Keywords :
BiCMOS digital integrated circuits; BiCMOS logic circuits; logic gates; BiCMOS domino logic family; area advantage; drive capability; dynamic operation; fabrication technology; feature size; logic gates; BiCMOS integrated circuits; Bipolar transistors; CMOS logic circuits; Clocks; DRAM chips; Logic gates; MOSFETs; Microprocessors; Power dissipation; Tellurium;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.521441