Title :
Optimal test set design for analog circuits
Author :
Milor, L. ; Sangiovanni-Vincentelli, A.
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Abstract :
Given the high cost of testing analog circuit functionality, it is proposed that tests for analog circuits should be designed to detect faults. An algorithm is presented that reduces functional test sets to only those that are sufficient to find out whether a circuit contains a parametric fault. Examples demonstrate that drastic reductions in test time can be achieved without sacrificing fault coverage.<>
Keywords :
integrated circuit testing; linear integrated circuits; analog circuit testing; fault coverage; functional test sets; optimal test set design; parametric fault; Analog circuits; Automatic testing; Circuit faults; Circuit testing; Digital systems; Electrical fault detection; Fault detection; Production systems; Robustness; System testing;
Conference_Titel :
Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2055-2
DOI :
10.1109/ICCAD.1990.129906
