Suitability of Hypervisor and MPSoC Architectures for the Execution Environment of an Integrated Embedded System

Current embedded systems offer enough performance to integrate on a single chip jobs that required several distributed devices in the past. The execution environment of such an integrated architecture should satisfy key requirements, such as, temporal predictability, fault containment or flexibility. In this paper we present these requirements and argue about the suitability of embedded hypervisors and a time-triggered Multi-Processor System-on-Chip (MPSoC) to implement them. We conclude that the MPSoC approach satisfies more naturally the mentioned specification. It shows more predictable behaviors and inherent fault containment properties that eases the development and certification process (e.g., IEC 61508) of integrated embedded systems.