Title :
New algorithms for the placement and routing of macro cells
Author :
Swartz, W. ; Sechen, C.
Author_Institution :
Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA
Abstract :
Novel algorithms are described for timing driven placement and routing of rectilinearly shaped macro cells. Algorithms are also presented for the implementation of simulated annealing, based on a theoretically derived statistical annealing schedule. A negative feedback scheme is described that optimizes the relative weighting between the primary objective term and the penalty function terms in the cost function. A placement refinement method has been developed for rectilinear cells which spaces the cells at a density which avoids the need for post-routing compaction. In addition, a detailed routing method has been developed which avoids the classically difficult problem of defining channels for detailed routing. The result for the ami33 benchmark circuit is better than the previously published results.<>
Keywords :
VLSI; circuit layout CAD; ami33 benchmark circuit; cost function; negative feedback scheme; penalty function terms; placement refinement; post-routing compaction; primary objective term; rectilinear cells; rectilinearly shaped macro cells; simulated annealing; statistical annealing schedule; timing driven placement; Circuit simulation; Compaction; Computational modeling; Cost function; Geometry; Negative feedback; Pins; Routing; Simulated annealing; Timing;
Conference_Titel :
Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2055-2
DOI :
10.1109/ICCAD.1990.129918