• DocumentCode
    2992451
  • Title

    Challenges & solutions in the die attach process for micro thin die

  • Author

    Siew Han Looe ; Soon Wei Wang

  • Author_Institution
    ON Semiconductor, Lot 122, Senawang Industrial Estate, 70450 Seremban, NSDK, West Malaysia, Malaysia
  • fYear
    2008
  • fDate
    4-6 Nov. 2008
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The drive for package thickness thinning and package size reduction has created new challenges for current wafer fabrication and assembly technology which has led to the smaller die and thinner wafer thickness trend. Thus, the conventional wafer thickness of 8 mils decreases to 4 mils is more challenging for the new innovation package of Micro Leadless Land Grid Array (µLLGA) with only 0.4mm package thickness.
  • Keywords
    Assembly; Copper; Fabrication; Lead; Microassembly; Semiconductor device packaging; Substrates; Textile industry; Tiles; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Manufacturing Technology Symposium (IEMT), 2008 33rd IEEE/CPMT International
  • Conference_Location
    Penang, Malaysia
  • ISSN
    1089-8190
  • Print_ISBN
    978-1-4244-3392-6
  • Electronic_ISBN
    1089-8190
  • Type

    conf

  • DOI
    10.1109/IEMT.2008.5507793
  • Filename
    5507793