DocumentCode :
299260
Title :
Pipelined adaptive IIR filter architecture
Author :
Shanbhag, Naresh R. ; Im, Gi-Hong
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
Volume :
1
fYear :
1995
fDate :
30 Apr-3 May 1995
Firstpage :
558
Abstract :
The authors present fine-grain pipelined architectures for adaptive infinite impulse response (AIIR) filters. The AIIR filters are equation error based. The proposed architectures are developed by employing a combination of scattered look-ahead and relaxed look-ahead pipelining techniques. The scattered look-ahead technique is applied do the non-adaptive (but time-varying) recursive section. The relaxed look-ahead technique is applied to the adaptive blocks. It is shown via simulations that speed-ups of up to 8 and more can be achieved with marginal or no degradation in performance
Keywords :
IIR filters; adaptive filters; circuit analysis computing; pipeline processing; adaptive IIR filter architecture; convergence analysis; equation error based filters; fine-grain pipelined architectures; relaxed look-ahead pipelining; scattered look-ahead pipelining; simulations; time-varying recursive section; Adaptive filters; Bit error rate; Equations; IIR filters; Pipeline processing; Polynomials; Scattering; Signal processing; Signal processing algorithms; System identification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
Type :
conf
DOI :
10.1109/ISCAS.1995.521574
Filename :
521574
Link To Document :
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