Parallel block realization of 2-D IIR digital filters

A new approach is introduced for the exact decomposition of a 2-d IIR digital fitler into a set of parallel filters plus a set of parallel blocks of multiply-in, add-out type of operations. It is shown that the adopted decomposition approach yields a general realization scheme of high parallelism and simple replicated hardware. It is also demonstrated that the new structure achieves much less data throughput delay per output sample than the block realization. Procedures for obtaining various other optimal realizations are discussed.