DocumentCode
299275
Title
A HDTV-suited architecture for a full search block-matching algorithm
Author
Honken, Stefan ; Yang, Feng-Ming ; Laur, Rainer
Author_Institution
Inst. for Microelectron., Bremen Univ., Germany
Volume
1
fYear
1995
fDate
30 Apr-3 May 1995
Firstpage
621
Abstract
This paper describes an architecture based on a new full search block-matching algorithm called vector-characterization algorithm (VCA). A single-chip realization in form of a 1.0 μm CMOS standard cell design shows that the architecture is suitable for HDTV applications
Keywords
CMOS digital integrated circuits; computational complexity; digital signal processing chips; high definition television; image matching; motion estimation; telecommunication computing; video coding; 1 micron; CMOS standard cell design; HDTV applications; HDTV-suited architecture; full search block-matching algorithm; single-chip realization; vector-characterization algorithm; Computational complexity; Computer architecture; Digital images; Electronic mail; HDTV; Image coding; Image sequences; Microelectronics; Motion estimation; TV;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-7803-2570-2
Type
conf
DOI
10.1109/ISCAS.1995.521590
Filename
521590
Link To Document