• DocumentCode
    2992866
  • Title

    A prototype chip of multicontext FPGA with DRAM for virtual hardware

  • Author

    Kawakami, Daisuke ; Shibata, Yuichiro ; Amano, Hideharu

  • Author_Institution
    Dept. of Comput. Sci., Keio Univ., Yokohama, Japan
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    17
  • Lastpage
    18
  • Abstract
    DRAM-type multicontext FPGA has potential for virtual hardware, since it is possible to implement a large number of contexts in a single chip. However, only a few examples have been reported because of the difficulty of the mixed process involving DRAM and logic. Here we try to implement a prototype multicontext FPGA with DRAM for virtual hardware
  • Keywords
    CMOS logic circuits; VLSI; field programmable gate arrays; random-access storage; 0.35 micron; DRAM; dynamic RAM; multicontext FPGA; prototype chip; virtual hardware; Computer science; Field programmable gate arrays; Hardware; Multiplexing; Programmable logic arrays; Prototypes; Random access memory; Reconfigurable logic; Table lookup; Virtual prototyping;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    0-7803-6633-6
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2001.913267
  • Filename
    913267
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2992866