DocumentCode
2993082
Title
A systolic architecture for gradient based adaptive subspace tracking algorithms
Author
Yang, Bin
Author_Institution
Dept. of Electr. Eng., Ruhr Univ. Bochum, Germany
fYear
1993
fDate
20-22 Oct 1993
Firstpage
516
Lastpage
524
Abstract
Subspace estimation plays an important role in a variety of modern signal processing applications. In an unknown and possibly changing environment, adaptive algorithms which are computationally efficient, numerically stable, and easy implementable in hardware are highly desirable. The author shows that gradient type adaptive algorithms are not only competitive in subspace tracking, but also advantageous in both the computational complexity and performance robustness. A novel systolic architecture for implementing these algorithms, with a high processor utilization, is presented
Keywords
adaptive estimation; adaptive signal processing; computational complexity; conjugate gradient methods; direction-of-arrival estimation; parallel algorithms; systolic arrays; DOA; adaptive subspace tracking algorithms; computational complexity; gradient based; performance robustness; signal processing; systolic architecture; triangular systolic array; Adaptive algorithm; Adaptive signal processing; Computational complexity; Computer architecture; Convergence; Eigenvalues and eigenfunctions; Hardware; Matrix decomposition; Robustness; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location
Veldhoven
Print_ISBN
0-7803-0996-0
Type
conf
DOI
10.1109/VLSISP.1993.404453
Filename
404453
Link To Document