Title :
Supplementary symmetrical logic circuit structure
Author :
Olson, Edgar Dan
Author_Institution :
EDO LLC, Moorpark, CA, USA
Abstract :
The Supplementary Symmetrical Logic Circuit Structure (SUS-LOC) is a fully active, self sustaining architecture intended primarily for the design and fabrication of logic synthesizing circuits with a radix greater than two. Any `r´-valued logic function of `n´-places (where: `r´ is the radix and an integer greater than I, and `n´ is an integer greater than 0) can be implemented with the SUS-LOC structure
Keywords :
logic circuits; multivalued logic; SUS-LOC; Supplementary Symmetrical Logic Circuit Structure; fully active; logic synthesizing circuits; self sustaining; CMOS logic circuits; FETs; Leakage current; Logic circuits; Logic design; Logic functions; Manufacturing; Switches; Switching circuits; Voltage;
Conference_Titel :
Multiple-Valued Logic, 1999. Proceedings. 1999 29th IEEE International Symposium on
Conference_Location :
Freiburg
Print_ISBN :
0-7695-0161-3
DOI :
10.1109/ISMVL.1999.779693
