• DocumentCode
    2993213
  • Title

    Application of Autosched AP Simulation Model in Wafer Fab

  • Author

    Tien, Victor Siow Yuen ; Teck, Yeo Eng ; Govindasamy, G.D. ; Kamaruddin, Shahrul

  • Author_Institution
    Silterra Malaysia Sdn Bhd, Kulim
  • fYear
    2006
  • fDate
    Oct. 29 2006-Dec. 1 2006
  • Firstpage
    846
  • Lastpage
    850
  • Abstract
    Wafer fabrication or "fab" simulation models are often used to assist the daily running of wafer production. Their main uses have been focused on testing production scenarios, to estimate cycle times, quote delivery times to customers, or test operational policies such as lot dispatching rules and material handling systems scheduling policies. Fab technologies sometimes stay in demand for as little as one year, after that wafer prices often drop rapidly. Based on this, many semiconductor manufacturers regard cycle time as the most important element and treat it as a monitored performance measure in wafer fabrication. One of the significant benefits of simulation modeling is the ability to conduct sensitivity ("What-If") analyses that allow us to experiment without disrupting the actual manufacturing operation. This paper will focus on and present the applications of the Autosched AP simulation software from Brooks Automation to provide ("What-IP\´) analysis and a characteristic curve relating Cycle time to Fab Utilization. The paper will show how simulation is used as a modeling tool to assist a production manager\´s decision-making process in production planning and effectively evaluate the factory\´s performance capabilities. Analysis will describe the impact of different percentage of factory loading on the cycle time.
  • Keywords
    decision making; dispatching; electronics industry; integrated circuit design; integrated circuit manufacture; materials handling; production engineering computing; production planning; Autosched AP simulation software; automated material handling systems; cycle time estimation; dispatching rules; fab simulation models; fab technologies; factory loading; factory´s performance capabilities; material handling system scheduling policies; production managers decision-making process; production planning; semiconductor manufacturers; test operational policies; wafer fabrication; wafer production; Analytical models; Dispatching; Fabrication; Job shop scheduling; Materials handling; Materials testing; Production systems; Semiconductor device manufacture; Semiconductor device modeling; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Electronics, 2006. ICSE '06. IEEE International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    0-7803-9730-4
  • Electronic_ISBN
    0-7803-9731-2
  • Type

    conf

  • DOI
    10.1109/SMELEC.2006.380757
  • Filename
    4266740