DocumentCode
2993373
Title
10.7 Gbit/s Low Power Consumption and Low Jitter EML TOSA Employing Interdigital Capacitor
Author
Okada, Norio ; Zaizen, Shiho ; Sugitatsu, Atsushi ; Hatta, Tatsuo ; Fujita, Takeshi ; Kogure, Taichi ; Miyazaki, Yasunori
Author_Institution
Information Technology R&D Center, Mitsubishi Electric Corporation, 4-1, Mizuhara, Itami, Hyogo 664-8641, Japan, Okada. Norio@dc.MitsubishiElectric.co.jp
fYear
2006
fDate
24-28 Sept. 2006
Firstpage
1
Lastpage
2
Abstract
A novel design scheme of interdigital capacitor suppressing multiple reflections can thermally separate a termination resistor from an electroabsorption modulator integrated laser diode, so that cooler power consumption of 0.45 W has been successfully achieved.
Keywords
Capacitors; Energy consumption; Equivalent circuits; Frequency; Jitter; Optical transmitters; Power transmission lines; Resistors; Temperature; Transmission line theory;
fLanguage
English
Publisher
ieee
Conference_Titel
Optical Communications, 2006. ECOC 2006. European Conference on
Conference_Location
Cannes, France
Print_ISBN
978-2-912328-39-7
Electronic_ISBN
978-2-912328-39-7
Type
conf
DOI
10.1109/ECOC.2006.4801259
Filename
4801259
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