DocumentCode
2993379
Title
Logical model for representing uncertain statuses of multiple-valued logic systems realized by min, max and literals
Author
Takagi, Noboru ; Hon-Nami, Akimitsu ; Nakashima, Kyoichi
Author_Institution
Dept. of Electron. & Inf., Toyama Prefectural Univ., Japan
fYear
1999
fDate
1999
Firstpage
110
Lastpage
115
Abstract
This paper discusses a logical model which is suitable for representing uncertain statuses existing in multiple-valued logic systems realized by minimum, maximum and literals. Then, some of the mathematical properties of functions defined by the logical model are presented
Keywords
multivalued logic; literals; logical model; mathematical properties; maximum; minimum; multiple-valued logic systems; uncertain statuses representation; Informatics; Logic circuits; Mathematical model; Multivalued logic; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic, 1999. Proceedings. 1999 29th IEEE International Symposium on
Conference_Location
Freiburg
ISSN
0195-623X
Print_ISBN
0-7695-0161-3
Type
conf
DOI
10.1109/ISMVL.1999.779704
Filename
779704
Link To Document