Title :
Planar high performance ring generators
Author :
Mrugalski, Grzegorz ; Mukherjee, Nilanjan ; Rajski, Janusz ; Tyszer, Jerzy
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
Abstract :
The paper presents enhanced architectures of pseudo-random test pattern generators and on-chip test data decompressors based on ring generators. The new structures are aimed at improving their layout and routing properties while at the same time reducing propagation delays introduced by associated phase shifters.
Keywords :
delays; logic testing; phase shifters; on-chip test data decompressors; phase shifters; planar high performance ring generators; propagation delays; pseudorandom test pattern generators; routing properties; Automata; Circuit testing; Flip-flops; Logic circuits; Phase shifters; Polynomials; Propagation delay; Ring generators; Routing; Test pattern generators;
Conference_Titel :
VLSI Test Symposium, 2004. Proceedings. 22nd IEEE
Print_ISBN :
0-7695-2134-7
DOI :
10.1109/VTEST.2004.1299243
