Title :
B-ternary logic based asynchronous micropipeline
Author :
Nagata, Yasunori ; Miller, D. Michael ; Mukaidono, Masao
Author_Institution :
Dept. of Electr. & Electr. Eng., Ryukyus Univ., Okinawa, Japan
Abstract :
In this paper, a B-ternary logic based asynchronous pipeline is presented. The pipeline processes binary dates elastically. It has high speed operation potential an spite of having an idle phase, because the stages of the pipeline operate concurrently. The mechanism for correct pipeline behavior and the designed circuits are provided
Keywords :
computer architecture; pipeline processing; ternary logic; B-ternary logic; asynchronous micropipeline; asynchronous pipeline; pipeline behavior; Computer aided instruction; Computer architecture; Computer science; Decoding; Digital arithmetic; Image processing; Information science; Logic circuits; Metastasis; Pipelines;
Conference_Titel :
Multiple-Valued Logic, 1999. Proceedings. 1999 29th IEEE International Symposium on
Conference_Location :
Freiburg
Print_ISBN :
0-7695-0161-3
DOI :
10.1109/ISMVL.1999.779719
