DocumentCode
2994142
Title
GF(2p) cellular automata as a built in self test structure
Author
Sikdar, Biplab K. ; Das, Debesh K. ; Boppana, Vamsi ; Yang, Cliff ; Mukherjee, Sobhan ; Chaudhuri, P. Pal
Author_Institution
Dept. of Comput. Sci. & Technol., Bengal Eng. Coll., India
fYear
2001
fDate
2001
Firstpage
319
Lastpage
324
Abstract
This paper presents an efficient BIST solution for VLSI circuit testing based on GF(2p) CA (cellular automata on an extended Galois field). The novel architecture of GF(2p) CA permits the BIST structure to be highly customized to the circuit under test (CUT). A methodology has been proposed to optimize the design of GF(2 p) CA structure to maximize the fault coverage in a given CUT. In addition, an innovative scheme based on logic folding is presented to reduce the BIST overhead and make it more effective for large circuits
Keywords
Galois fields; VLSI; built-in self test; cellular automata; fault diagnosis; integrated circuit testing; logic testing; BIST overhead; BIST solution; CUT; GF(2p) cellular automata; VLSI circuit testing; built in self test structure; circuit under test; extended Galois field; fault coverage; logic folding; Automata; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Computer science; Educational institutions; Laboratories; Logic circuits; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
0-7803-6633-6
Type
conf
DOI
10.1109/ASPDAC.2001.913326
Filename
913326
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