An experimental study on the application of Carbon nanotubes (CNTs) as thermal interfacial material in processor chip testing

Increase in processor chip power has pushed the need for new thermal interface material (TIM) in test environment. TIM that provides high thermal conductivity and mechanical reliability in High volume manufacturing (HVM) is desired. This paper studies the Carbon nanotubes (CNTs) array as a feasible TIM solution in HVM test environment. Thermal resistance of CNTs array decorated silicon and bare silicon were obtained from experiment. CNTs array TIM shows 21.7% improvement in junction to case thermal resistance measurement under steady state force air convection experimental setup. Thermal resistance of CNT were then compare to Alloy thermal interface solution that has been deployed in HVM. Under the similar test setup, thermal resistance of CNTs array and Alloy TIM are measured as 0.296°C/Watt and 0.383°C/Watt respecitvely.