DocumentCode
2994350
Title
KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect
Author
Ji, Hao ; Devgan, Anirudh ; Dai, Wayne
Author_Institution
Dept. of Comput. Eng., Santa Cruz Univ., CA, USA
fYear
2001
fDate
2001
Firstpage
379
Lastpage
384
Abstract
On-chip inductance extraction is difficult due to the global effect of inductance, and simulating the resulting dense partial inductance matrix is even more difficult. Furthermore, it is well known that simply discarding smallest terms to sparsify the inductance matrix can render the partial inductance matrix indefinite and result in an unstable circuit model. Recently a new circuit element, K, has been introduced to capture the global effect of inductance by evaluating a corresponding sparse K matrix. However, the reason that K has such local properties is not clear, and the positive semi-definiteness of the corresponding sparse K matrix is not proved. In this paper, we present the physical interpretation of K. Based on the physical interpretation, we explain why the faraway mutual K can be ignored (locality) and prove that after ignoring faraway mutual K, the resultant K matrix is positive definite (stability). Together with a RKC equivalent circuit model, the locality and stability enables us to simulate an RKC circuit directly and efficiently for real circuits. A new circuit simulation tool, KSim, has been developed by incorporating the new circuit element K into Berkeley SPICE. The RKC simulation matches better with the full partial inductance matrix simulation with significant less computing time and memory usage, compared to other proposed methods, such as the shift-truncate method
Keywords
circuit simulation; equivalent circuits; inductance; integrated circuit interconnections; integrated circuit modelling; matrix algebra; stability; transient analysis; Berkeley SPICE; KSim simulator; RKC equivalent circuit model; circuit simulation tool; onchip inductance effect capture; partial inductance matrix simulation; stable RKC simulator; Circuit simulation; Circuit stability; Computational modeling; Coupling circuits; Inductance; Integrated circuit interconnections; Microelectronics; SPICE; Sparse matrices; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
0-7803-6633-6
Type
conf
DOI
10.1109/ASPDAC.2001.913336
Filename
913336
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