DocumentCode :
2994353
Title :
Transistor sizing: how to control the speed and energy consumption of a circuit
Author :
Ebergen, Jo ; Gainsley, Jonathan ; Cunningham, Paul
Author_Institution :
Sun Microsyst. Labs., Mountain View, CA, USA
fYear :
2004
fDate :
19-23 April 2004
Firstpage :
51
Lastpage :
61
Abstract :
We introduce a simple model for calculating transistor sizes of an asynchronous control circuit. The model builds on the theory of logical effort and relates transistor sizes to the speed and energy consumption of a circuit. We show how to calculate transistor sizes quickly, how to calculate the speed limit of a circuit, and how to compare circuits in terms of energy-versus-speed independent of a process technology. We compare three asynchronous control circuits for a FIFO: a chain of C-elements, an asP control, and a GasP control.
Keywords :
asynchronous circuits; circuit optimisation; integrated circuit design; low-power electronics; power consumption; size measurement; transistors; C-elements chain; FIFO; GasP control; asP control; asynchronous control circuit; circuit energy consumption; logical effort; speed control; speed limit; transistor sizing; Application specific processors; Capacitance; Delay estimation; Energy consumption; Equations; Laboratories; Latches; Logic circuits; Size control; Sun;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asynchronous Circuits and Systems, 2004. Proceedings. 10th International Symposium on
ISSN :
1522-8681
Print_ISBN :
0-7695-2133-9
Type :
conf
DOI :
10.1109/ASYNC.2004.1299287
Filename :
1299287
Link To Document :
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