• DocumentCode
    2994646
  • Title

    A Multi-bit Switched Capacitor DAC with Robust Analog Background Calibration

  • Author

    Cao, Zhiheng ; Yan, Shouli

  • Author_Institution
    Department of Electrical and Computer Engineering, The University of Texas At Austin, Austin, TX 78712, USA
  • Volume
    1
  • fYear
    2006
  • fDate
    6-9 Aug. 2006
  • Firstpage
    12
  • Lastpage
    16
  • Abstract
    A multi-bit switched-capacitor DAC with robust analog background calibration intended to be used as feedback DAC for multi-bit pipeline ADCs or broadband sigma delta ADCs with how oversampling ratio is presented in this paper. The accuracy of calibration is not limited by mismatch of charge injections. A multi-bit switched-capacitor DAC whose linearity is only limited by opamp DC gain is realized. Assuming mismatch in capacitor values, switch transistor threshold voltages and opamp offsets, simulation results show linearity improves by about 40dB to 15-bit after about 900 sampling clock periods.
  • Keywords
    Calibration; Capacitors; Delta-sigma modulation; Feedback; Linearity; Pipelines; Robustness; Sampling methods; Switches; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
  • Conference_Location
    San Juan, PR
  • ISSN
    1548-3746
  • Print_ISBN
    1-4244-0172-0
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2006.381982
  • Filename
    4267059