Title :
An asynchronous, iterative implementation of the original Booth multiplication algorithm
Author :
Efthymiou, A. ; Suntiamorntut, W. ; Garside, J. ; Brackenbury, L.E.M.
Author_Institution :
Dept. of Comput. Sci., Manchester Univ., UK
Abstract :
One of the main reasons for using asynchronous design is that it offers the opportunity to exploit the data-dependent latency of many operations in order to achieve low-power, high-performance, or low area. This paper describes a novel, asynchronous, iterative multiplier which exhibits data-dependency in both the number of iterations required to produce the result and in the delay of each step of the iteration. The preliminary evaluation of the multiplier, implemented using standard-cells, shows that speed improvements can be achieved in comparison to a standard iterative, radix-4 Booth multiplier.
Keywords :
asynchronous circuits; digital arithmetic; iterative methods; low-power electronics; multiplying circuits; Booth multiplication algorithm; asynchronous design; asynchronous implementation; asynchronous multiplier; data-dependent latency; high-performance design; iterative implementation; iterative multiplier; low area design; low-power design; speed improvements; standard-cells based multiplier; Adders; Algorithm design and analysis; Asynchronous circuits; Computer science; Design optimization; Energy consumption; Iterative algorithms; Propagation delay;
Conference_Titel :
Asynchronous Circuits and Systems, 2004. Proceedings. 10th International Symposium on
Print_ISBN :
0-7695-2133-9
DOI :
10.1109/ASYNC.2004.1299304