DocumentCode :
2995949
Title :
Verification of trace length and trace impedance of fabricated load board using TDR
Author :
Low, S.M. ; Phoon, M. ; Suffian, A. ; Johan
Author_Institution :
Sch. of Eng., Monash Univ. Malaysia, Bandar Sunway, Malaysia
fYear :
2009
fDate :
15-16 July 2009
Firstpage :
401
Lastpage :
404
Abstract :
In the realm of high speed semiconductor IC testing, the medium whereby the test signals passed has important role in order to ensure that the signal transmitted and received are the correct signals. One of the media that the signal passed in IC testing is the device interface board or load board in short. Load board is basically a printed circuit board with test socket(s) for inserting device under test (DUT) during the testing. It consists of numerous conductive traces connecting the DUT to the tester. They are carefully designed according to impedance design and control for the task they have to perform for the specific semiconductor devices. Once they are fabricated it is not possible to physically measure the trace length and impedance to validate their correctness since the traces are built internally. TDR has recently been used in the semiconductor industry for transmission line characterization and signal integrity analysis. TDR method was used successfully in this study to verify the trace length and impedance of the fabricated load board used for semiconductor´s speed testing. The trace length of the evaluation load board was verified to within 8% accuracy. The trace impedance was measured to be 48 ohms which is very close to the theoretical value of 50 ohm. Thus the TDR method served as an useful tool for verification of the trace length and trace impedance of the load board.
Keywords :
integrated circuit testing; printed circuits; time-domain reflectometry; device interface board; device under test; integrated circuit testing; load board; printed circuit board; trace impedance verification; trace length verification; Circuit testing; High speed integrated circuits; Impedance measurement; Integrated circuit testing; Joining processes; Length measurement; Printed circuits; Semiconductor device testing; Semiconductor devices; Transmission line measurements;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-4952-1
Electronic_ISBN :
978-1-4244-4952-1
Type :
conf
DOI :
10.1109/ASQED.2009.5206229
Filename :
5206229
Link To Document :
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