DocumentCode
2996097
Title
An Embedded Vision Services Framework for Heterogeneous Accelerators
Author
Gudis, Eduardo ; Pullan Lu ; Berends, David ; Kaighn, Kevin ; van der Wal, Gooitzen ; Buchanan, Graham ; Sek Chai ; Piacentino, Michael
Author_Institution
SRI Int., Princeton, NJ, USA
fYear
2013
fDate
23-28 June 2013
Firstpage
598
Lastpage
603
Abstract
This paper describes an architecture framework using heterogeneous hardware accelerators for embedded vision applications. This approach leverages the recent single-chip heterogeneous FPGAs that combine powerful multicore processors with extensive programmable gate array fabric on the same die. We present a framework using an extensive library of pipelined real time vision hardware accelerators and a service-based software architecture. This field-proven system design approach provides embedded vision developers with a powerful software abstraction layer for rapidly and efficiently integrating any of hardware accelerators for applications such as image stabilization, moving target indication, contrast normalization enhancement, and others. The framework allows the service-based software to take advantage of the hardware acceleration blocks available and perform the remainder of the processing in software. As performance requirements increase, more hardware acceleration can be added to the FPGA fabric, thus offloading the main processor.
Keywords
computer vision; field programmable gate arrays; programmable circuits; software architecture; architecture framework; contrast normalization enhancement; embedded vision services framework; field-proven system design approach; heterogeneous accelerator; heterogeneous hardware accelerator; image stabilization; moving target indication; multicore processor; pipelined real time vision hardware accelerator; programmable gate array fabric; service-based software architecture; single-chip heterogeneous FPGA; software abstraction layer; Acceleration; Field programmable gate arrays; Hardware; Image resolution; Program processors; Streaming media; FPGA; computer vision; embedded system; heterogeneous architecture; service framework; video processing; zynq;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Vision and Pattern Recognition Workshops (CVPRW), 2013 IEEE Conference on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/CVPRW.2013.90
Filename
6595934
Link To Document