Object Recognition on a Chip: A Complete SURF-Based System on a Single FPGA

Author

Schaeferling, Michael ; Kiefer, Gundolf

Author_Institution

Dept. of Comput. Sci., Augsburg Univ. of Appl. Sci., Augsburg, Germany

fYear

2011

fDate

Nov. 30 2011-Dec. 2 2011

Firstpage

49

Lastpage

54

Abstract

This paper describes a system for robust optical object recognition based on sophisticated point features which is completely implemented in a medium-size FPGA. All components needed to process image data are integrated in a System-on-Chip, including a special IP core which accelerates the feature detection step of the Speeded-up Robust Features (SURF) algorithm. The task of object recognition is solved by a lightweightmatching algorithm. The system was evaluated with a set of 60 scene images. All 7 test objects were recognized at a sensitivity of 93% without any false positives at all. The minimum total execution time for one frame was 191ms, and the average time was 481ms.

Keywords

field programmable gate arrays; image matching; microprocessor chips; object recognition; system-on-chip; FPGA; IP core; complete SURF-based system; field programmable gate array; image data processing; matching algorithm; robust optical object recognition; speeded-up robust feature algorithm; system-on-chip; Databases; Detectors; Feature extraction; Field programmable gate arrays; Hardware; Object recognition; Streaming media; Augmented Reality; FPGA; Feature Matching; Object Recognition;

fLanguage

English

Publisher

ieee

Conference_Titel

Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference on

Conference_Location

Cancun

Print_ISBN

978-1-4577-1734-5

Type

conf

DOI

10.1109/ReConFig.2011.65

Filename

6128553