A Reconfigurable Computing System Based on a Cache-Coherent Fabric

Author

Oliver, Neal ; Sharma, Rahul R. ; Chang, Stephen ; Chitlur, Bhushan ; Garcia, Elkin ; Grecco, Joseph ; Grier, Aaron ; Ijih, Nelson ; Liu, Yaping ; Marolia, Pratik ; Mitchel, Henry ; Subhaschandra, Suchit ; Sheiman, Arthur ; Whisonant, Tim ; Gupta, Prabhat

fYear

2011

fDate

Nov. 30 2011-Dec. 2 2011

Firstpage

80

Lastpage

85

Abstract

Typical reconfigurable computing systems are based on an I/O interconnect such as PCIe. This yields good bandwidth performance, but incurs significant overhead for small packet sizes, and makes the implementation of on-streaming-data applications unduly difficult. We describe an architecture based on Intel^® Quick Path Interconnect^® that addresses these concerns.

Keywords

cache storage; field programmable gate arrays; reconfigurable architectures; I/O interconnect; Intel Quick Path Interconnect; PCIe; bandwidth performance; cache-coherent fabric; in-socket FPGA; on-streaming-data applications; packet sizes; reconfigurable computing system; Fabrics; Field programmable gate arrays; Hardware; Kernel; Memory management; Protocols; Reconfigurable computing; cache coherent; in-socket FPGA; shared virtual memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference on

Conference_Location

Cancun

Print_ISBN

978-1-4577-1734-5

Type

conf

DOI

10.1109/ReConFig.2011.4

Filename

6128558