DocumentCode :
2996199
Title :
Unbiased reliability with one bit error correction
Author :
Koo, David Y.
Author_Institution :
Westinghouse Electr. Corp., Baltimore, MD, USA
fYear :
1988
fDate :
26-28 Jan 1988
Firstpage :
350
Lastpage :
355
Abstract :
Leading error correction code (ECC) semiconductor memory reliability prediction models are reviewed. The concept of biasness is discussed. An unbiased model development methodology is introduced by using a sample model with eight failure modes. A step-by-step prediction procedure is also provided to enable readers to use the new sample model
Keywords :
circuit reliability; error correction codes; integrated memory circuits; error correction code; failure modes; reliability prediction models; semiconductor memories; unbiased model; Block codes; Centralized control; Circuits; Error correction; Error correction codes; Hardware; Predictive models; Random access memory; Read-write memory; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability and Maintainability Symposium, 1988. Proceedings., Annual
Conference_Location :
Los Angeles, CA
Type :
conf
DOI :
10.1109/ARMS.1988.196475
Filename :
196475
Link To Document :
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