DocumentCode
2996239
Title
Multiplier-less realisation of piecewise linear functions
Author
Horrocks, David H. ; Conder, Steven J.
Author_Institution
Cardiff Sch. of Eng., Cardiff Univ. of Wales, UK
Volume
4
fYear
1997
fDate
9-12 Jun 1997
Firstpage
2597
Abstract
A method for the representation of a piecewise linear function, based on simple nonlinear operators is presented. It utilises primitive operator graph synthesis, which enables a low complexity multiplierless structure to be obtained. The example of a sigmoid function for neural networks, is used to illustrate the method
Keywords
VLSI; digital signal processing chips; functions; neural chips; piecewise-linear techniques; low complexity multiplierless structure; multiplier-less realisation; neural networks; nonlinear operators; piecewise linear functions; primitive operator graph synthesis; sigmoid function; Circuits; Digital signal processing; Diodes; Equations; Network synthesis; Neural networks; Piecewise linear approximation; Piecewise linear techniques; Rectifiers; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.612856
Filename
612856
Link To Document