DocumentCode
2996271
Title
Reliability-aware global routing under thermal considerations
Author
Lu, Katrina ; Pan, David Z.
Author_Institution
Dept. of ECE, Univ. of Texas at Austin, Austin, TX, USA
fYear
2009
fDate
15-16 July 2009
Firstpage
313
Lastpage
318
Abstract
Thermal effect is a key factor to interconnect reliability degradation. As technology scales, the distance between the metal layers and substrate continues to shrink and significantly increases the impact of substrate temperature on interconnect reliability. While it is already a concern in 2D ICs, the thermal impact will be more challenging in the emerging 3D ICs architecture. In this paper, we present a reliability-aware global routing with thermal considerations. We propose two techniques, thermal-driven Minimum Spanning Tree (MST) construction and thermal-driven maze routing, to reduce the probability of interconnect failures. Experimental results show that our router effectively reduces the failure rate by approximately 13% on average, with little overhead on the traditional design objectives.
Keywords
failure analysis; integrated circuit interconnections; integrated circuit reliability; network routing; network topology; thermal analysis; 2D IC; interconnect failure rate; interconnect reliability; metal layers; reliability-aware global routing; substrate temperature effect; thermal-driven minimum spanning tree; Integrated circuit interconnections; Reliability; Resource management; Routing; Runtime; Temperature; Thermal degradation; Thermal factors; Timing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-4952-1
Electronic_ISBN
978-1-4244-4952-1
Type
conf
DOI
10.1109/ASQED.2009.5206246
Filename
5206246
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