Title :
Protective buffer policies at ATM switches
Author :
Hartanto, F. ; Sirisena, H.R. ; Pawlikowski, K.
Author_Institution :
Dept. of Electr. & Electron. Eng., Canterbury Univ., Christchurch, New Zealand
Abstract :
The current standardisation of one bit in the ATM cell header to indicate loss priority allows the differentiation of high and low priority cells. The convergence within a network of cells from both priority classes can lead to interference between the two cell classes in the sense that overload of low priority cells can also degrade the high priority cell stream QoS. It is thus necessary for the network to implement a buffer policy that can protect the high priority cells by minimising such interference, while simultaneously maximising the utilisation of network resources. We propose a general protection criterion and identify protective buffer policies through simulation results.
Keywords :
asynchronous transfer mode; buffer storage; queueing theory; telecommunication services; telecommunication switching; telecommunication traffic; ATM cell header; ATM switches; QoS; cell classes; dual queues with limited cyclic service; high priority cell; interference; loss priority; low priority cells; network resources; protective buffer policies; quality of service; simulation results; standardisation; Asynchronous transfer mode; B-ISDN; Convergence; Delay; Interference; Protection; Quality of service; Switches; Telecommunication traffic; Traffic control;
Conference_Titel :
Communications, 1995. ICC '95 Seattle, 'Gateway to Globalization', 1995 IEEE International Conference on
Conference_Location :
Seattle, WA, USA
Print_ISBN :
0-7803-2486-2
DOI :
10.1109/ICC.1995.524244