DocumentCode
2996363
Title
Design of serial input PLL frequency synthesizer
Author
Deng, Youxun ; Yu, Guowen
Author_Institution
Dept. of Basic Courses, Air Force Radar Acad., Wuhan, China
fYear
2000
fDate
2000
Firstpage
209
Lastpage
212
Abstract
This paper introduces the design procedure of a serial input PLL frequency synthesizer with pulse-swallow function. Its of characteristics include simple construction, good stability and high precision
Keywords
frequency synthesizers; phase locked loops; MB1501 BiCMOS chip; VCO; design procedure; high precision; microprocessor; pulse-swallow function; serial input PLL frequency synthesizer; stability; Circuit synthesis; Counting circuits; Frequency conversion; Frequency synthesizers; Microprocessors; Phase locked loops; Process design; Radar; Switches; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. IEEE APCCAS 2000. The 2000 IEEE Asia-Pacific Conference on
Conference_Location
Tianjin
Print_ISBN
0-7803-6253-5
Type
conf
DOI
10.1109/APCCAS.2000.913444
Filename
913444
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