DocumentCode :
2996506
Title :
An MTCMOS power network design flow
Author :
Xu, Yijia ; Yeap, Gary K.
Author_Institution :
Synopsys Inc., Shanghai, China
fYear :
2009
fDate :
15-16 July 2009
Firstpage :
266
Lastpage :
269
Abstract :
We present an MTCMOS switch cell power network design approach from a flow perspective. It begins with switch cell configuration exploration during the floorplanning phase. High-level area, congestion and IR-drop tradeoff is made during early design flow. At the chip implementation phase, the switch cells are further optimized by cell sizing and optimization to meet IR-drop and power dissipation targets. Finally, ECO operations are applied near the end of the design flow to accommodate late-stage design changes. This design approach allows for a graceful convergence of MTCMOS switch cells in power network design and reduces uncertainties and iterations during the flow. This is similar to the timing convergence flow that is currently a standard practice in every chip design. We showed, with experimental results, that this was an effective methodology to design power networks with MTCMOS switch cells.
Keywords :
CMOS integrated circuits; integrated circuit layout; switched mode power supplies; IR-drop tradeoff; MTCMOS power network design; floorplanning phase; power network design; switch cell configuration; timing convergence flow; CMOS technology; Circuits; Convergence; Leakage current; MOSFETs; Network synthesis; Power dissipation; Switches; Timing; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-4952-1
Electronic_ISBN :
978-1-4244-4952-1
Type :
conf
DOI :
10.1109/ASQED.2009.5206257
Filename :
5206257
Link To Document :
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