High-Speed Stochastic Processes Generator Based on Sum-of-Sinusoids for Channel Emulation

In this paper a high-speed fading architecture that generates multiple stochastic processes based on the Sum-of-Sinusoids (SOS) method is presented. In the proposed architecture, the fading samples are generated according to either symmetrical or asymmetrical power spectral density (PSD) in an efficient FPGA-based architecture. This proposal allows the emulation of more realistic channels in non-isotropic environments. The sinusoid evaluation is performed by the piecewise polynomial approximation using processor arrays (PAs) technique in an efficient hardware-level structure. This technique offers the maximum possible parallelism, high accuracy in the generated samples, high frequency resolution as well as high rate sinusoid evaluation. The proposed architecture can be used to construct a flexible channel emulator for the current communication standards.