DocumentCode :
2997404
Title :
The cell level description of systolic block regularised QR filter
Author :
Kadlec, J.
Author_Institution :
Inst. of Inf. Theory & Autom., Acad. of Sci., Prague, Czech Republic
fYear :
1993
fDate :
20-22 Oct 1993
Firstpage :
298
Lastpage :
306
Abstract :
A general theory invented by Kulhavy provides the firm background for regularisation of identification with guaranteed properties. It pays for the generality by an increase of computational complexity. For this reason an order in magnitude faster, block regularised parameter estimator has been proposed. The author presents the cell-level description of the systolic array implementation of the block regularised algorithm, preserving the excellent properties of Kulhavy regularisation
Keywords :
adaptive estimation; adaptive filters; computational complexity; least squares approximations; parallel algorithms; recursive estimation; recursive filters; systolic arrays; Kulhavy regularisation; RLS; block regularised parameter estimator; cell level description; compacted array architecture; computational complexity; systolic array implementation; systolic block regularised QR filter; Computational complexity; Cost function; Delay estimation; Filters; Least squares methods; Noise measurement; Parameter estimation; Resonance light scattering; Signal processing algorithms; Systolic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location :
Veldhoven
Print_ISBN :
0-7803-0996-0
Type :
conf
DOI :
10.1109/VLSISP.1993.404476
Filename :
404476
Link To Document :
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