A study of buffer layers in a double channel InP-HFET structure

Extremely high frequency performances have been reported on InP field effect transistors. These devices are usually grown by molecular beam epitaxy. The use of metal organic vapor phase epitaxy offers interesting prospects for their fabrication. However specific problems are related to the growth of an insulating buffer layer under the FET channel. One solution consists in growing low temperature InAlAs or semi-insulating materials such as Fe-doped InP: high resistivity is obtained due to the concentration of deep centers. We have measured the parasitic effects generated by the InAlAs buffer layers on drain current transients, low-frequency transconductance and output conductance. Investigation on the emission-type transient by an isothermal current relaxation technique has supplied information on trap signatures. This type of analysis makes it possible to search for a good compromise between the high electrical resistance of buffer layers and their parasitic effects. The parasitic effects can be reduced to a minimum by controlling the thickness and the growth temperature of the buffer layer. The presence of the thicker (20 nm instead of 10 nm) 650 °C InA1As buffer layer has allowed better electrical results