DocumentCode
2997512
Title
Enumeration of Costas Arrays Using GPUs and FPGAs
Author
Arce-Nazario, Rafael A. ; Ortiz-Ubarri, Jose R.
Author_Institution
Dept. of Comput. Sci., Univ. of Puerto Rico, Piedras, Puerto Rico
fYear
2011
fDate
Nov. 30 2011-Dec. 2 2011
Firstpage
462
Lastpage
467
Abstract
The enumeration of Costas arrays is a problem that grows factorially with input size and that has lately been completed for sizes up to 28 using computer clusters. This paper presents designs for solving this problem using, separately, GPUs and FPGAs. Both implementations rely on Costas array symmetries to reduce the search space and perform concurrent explorations over the remaining candidate solutions. The fine grained parallelism utilized to evaluate and progress the exploration, coupled with the additional concurrency provided by the multiple instanced cores allowed the FPGA (XC5VLX330-2) implementation to achieve speedups of up to 40× over the GPU (GeForce GTX 480). Estimates for bigger sizes, up to N = 28 indicate a speedup of 4.44× over the fastest reported software implementation.
Keywords
concurrency theory; field programmable gate arrays; graphics processing units; Costas arrays; FPGA; GPU; computer clusters; concurrency; Acceleration; Algorithm design and analysis; Arrays; Field programmable gate arrays; Graphics processing unit; Instruction sets; Costas arrays; FPGA; GPU; backtracking;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference on
Conference_Location
Cancun
Print_ISBN
978-1-4577-1734-5
Type
conf
DOI
10.1109/ReConFig.2011.36
Filename
6128620
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