DocumentCode
2997703
Title
VLSI circuits with fractal layout for spatial image decorrelation
Author
Rovetta, Stefano ; Zunino, Rodolfo
Author_Institution
Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
Volume
4
fYear
1999
fDate
36342
Firstpage
110
Abstract
The design methodology uses Peano-Hilbert 2-D curves to build up efficient circuits that destroy the spatial autocorrelation of an image. The approach applies to several crucial areas of information processing, such as cryptography and associative memories. Also its validity stems from the fractal structure of the curves. The fractal curve topology drives the VLSI circuit layout, which includes many elementary cells operating at the local level. The resulting distributed architecture supports pseudo-random pixel remapping, and the self-similarity of the layout strongly simplifies electronic circuit implementations
Keywords
VLSI; decorrelation; digital signal processing chips; fractals; image coding; image processing equipment; integrated circuit layout; pipeline processing; DSP; Peano-Hilbert 2D curves; VLSI circuit layout; VLSI circuits; design methodology; distributed architecture; electronic circuit implementations; fractal curve topology; fractal layout; layout self-similarity; pseudo-random pixel remapping; spatial autocorrelation destruction; spatial image decorrelation; Associative memory; Autocorrelation; Circuit topology; Cryptography; Decorrelation; Design methodology; Electronic circuits; Fractals; Information processing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location
Orlando, FL
Print_ISBN
0-7803-5471-0
Type
conf
DOI
10.1109/ISCAS.1999.779954
Filename
779954
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