• DocumentCode
    2997966
  • Title

    A New Low Power High Performance Flip-Flop

  • Author

    Sayed, Ahmed ; Al-Asaad, Hussain

  • Author_Institution
    Department of Electrical and Computer Engineering, University of California, Davis, CA, U.S.A.
  • Volume
    1
  • fYear
    2006
  • fDate
    6-9 Aug. 2006
  • Firstpage
    723
  • Lastpage
    727
  • Abstract
    Low power flip-flops are crucial for the design of low-power digital systems. In this paper we delve into the details of flip-flop design and optimization for low power. We compare the lowest power flip-flops reported in the literature and introduce a new flip-flop that competes with them.
  • Keywords
    CMOS process; CMOS technology; Circuits; Clocks; Energy consumption; Flip-flops; Integral equations; Latches; Transistors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
  • Conference_Location
    San Juan, PR
  • ISSN
    1548-3746
  • Print_ISBN
    1-4244-0172-0
  • Electronic_ISBN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2006.382164
  • Filename
    4267241
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2997966