A new parallel banyan ATM switch architecture

Author

Fun, Chang Ann ; Silvester, John A.

Author_Institution

Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA

Volume

1

fYear

1995

fDate

18-22 Jun 1995

Firstpage

523

Abstract

Proposes an ATM switch architecture using multiple banyan networks connected in parallel (MBCP) which can resolve the inherent blocking problems in banyan-based switches. In various traffic simulations, the MBCP switch has shown very good performance in terms of packet loss rate, switching latency, and hardware complexity under heavy traffic load and nonuniform traffic patterns for large-scale ATM switching applications

Keywords

asynchronous transfer mode; buffer storage; computational complexity; electronic switching systems; multiprocessor interconnection networks; packet switching; parallel architectures; telecommunication traffic; MBCP switch; banyan-based switches; hardware complexity; inherent blocking problems; large-scale ATM switching applications; multiple banyan networks connected in parallel; nonuniform traffic patterns; packet loss rate; parallel banyan ATM switch architecture; performance; switching latency; traffic load; traffic simulations; Asynchronous transfer mode; Buffer storage; Delay; Fabrics; Hardware; Large-scale systems; Packet switching; Routing; Switches; Telecommunication traffic;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, 1995. ICC '95 Seattle, 'Gateway to Globalization', 1995 IEEE International Conference on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-2486-2

Type

conf

DOI

10.1109/ICC.1995.525223

Filename

525223