Future semiconductor manufacturing: challenges and opportunities

Author

Iwai, Hiroshi

Author_Institution

Frontier Collaborative Res. Center, Tokyo Inst. of Technol., Yokohama, Japan

fYear

2004

fDate

13-15 Dec. 2004

Firstpage

11

Lastpage

16

Abstract

Recently, CMOS scaling has been accelerated very aggressively in both production and research levels. Already, sub-100 nm gate length CMOS LSIs are used for many applications in a huge volume and even transistor operation of 5 nm gate length CMOS was reported in a conference. However, many serious problems are expected for implementing smaller-geometry MOSFETs into large-scale integrated circuits even at the 45 nm (HP65nm) technology node. The skyrocketing increase of production costs is a serious concern and many people feel some kind of drastic evolution or even a revolution is required in order to continue several more generations towards 10 nm. In this paper, future semiconductor manufacturing challenges are described including the possible limits of scaling.

Keywords

CMOS integrated circuits; MOSFET; integrated circuit manufacture; large scale integration; nanoelectronics; semiconductor device manufacture; 45 nm; 5 nm; 65 nm; CMOS scaling; MOSFET; large-scale integrated circuits; production cost; semiconductor manufacturing challenges; sub-100 nm gate length CMOS LSI; Acceleration; Artificial intelligence; CMOS technology; Humans; Integrated circuit technology; Intelligent robots; Intelligent sensors; MOSFETs; Production; Semiconductor device manufacture;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International

Print_ISBN

0-7803-8684-1

Type

conf

DOI

10.1109/IEDM.2004.1419051

Filename

1419051