Title :
Generation of hardware machine models from instruction set descriptions
Author :
Fauth, A. ; Freericks, M. ; Knoll, A.
Author_Institution :
Inst. fuer Tech. Inf., Tech. Univ. Berlin, Germany
Abstract :
The authors describe how a modular machine description, which specifies the functionality and the binary representation of an instruction set, can be transformed into a hardware model. This model is built from new generic hardware entities (registers, memories, arithmetic/logic operators, selectors and connections) and may eventually serve as an input to high-level hardware synthesis tools. The transformation steps on the way from the machine description to the hardware model are explained by giving an example
Keywords :
hardware description languages; high level synthesis; instruction sets; arithmetic/logic operators; binary representation; connections; functionality; hardware machine models; high-level hardware synthesis tools; instruction set descriptions; memories; modular machine description; registers; selectors; Arithmetic; Circuits; Digital signal processing; Hardware; High level synthesis; Logic; Registers; Signal design; Signal processing; Signal synthesis;
Conference_Titel :
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location :
Veldhoven
Print_ISBN :
0-7803-0996-0
DOI :
10.1109/VLSISP.1993.404482