Independent BRM multi patterns with VFC

Author

Tipsuwanporn, V. ; Tirasesth, K. ; Sattho, U. ; Witheephanich, K. ; Chuenarom, S.

Author_Institution

Fac. of Eng., King Mongkut´´s Inst. of Technol., Bangkok, Thailand

fYear

2000

fDate

2000

Firstpage

622

Lastpage

625

Abstract

In this paper a voltage-to-frequency conversion (VFC) circuit with Binary Rate Multipliers (BRM) output is presented. We first analyze the spectrum value and percentage of Binary Bit Rate (BBR) power then reject the repeated power values, and select only one BBR signal to construct BRM by linear combination. A VFC design with 1 to 5 volts (Vin) and ±2.5 volts (Vout) can generate a BRM pattern (0 Hz-39.0625 kHz) in sine, triangular, sawtooth and square waveform. The average value of the VFC output signal is fed back to the input of the VFC in order to stabilize the pattern for BRM transmission. The output patterns and frequencies can be controlled either independently or simultaneously

Keywords

circuit feedback; circuit stability; multiplying circuits; voltage-frequency convertors; waveform generators; -2.5 V; 0 Hz to 39.0625 kHz; 1 to 5 V; 2.5 V; BRM pattern generation; BRM transmission; DC motor speed control application; V/F converter; VFC output signal feedback; binary bit rate power; binary rate multipliers; independent BRM multi patterns; linear combination; sawtooth waveform; sine waveform; square waveform; triangular waveform; voltage-to-frequency conversion circuit; Asia; Bit rate; Circuits; Fourier series; Frequency; Integral equations; Logic; Power engineering and energy; Signal analysis; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2000. IEEE APCCAS 2000. The 2000 IEEE Asia-Pacific Conference on

Conference_Location

Tianjin

Print_ISBN

0-7803-6253-5

Type

conf

DOI

10.1109/APCCAS.2000.913578

Filename

913578