Ultra low power four-quadrant multiplier/two-quadrant divider circuit using FGMOS

This paper presents a novel ultra low power wide-range four-quadrant multiplier/two-quadrant divider circuit. The proposed circuit is implemented using floating gate MOS (FGMOS) devices operating in weak inversion. The wide range is achieved by means of a predistortion technique based on having different input capacitances in the FGMOS transistors. The circuit compares favourably to other ultra low power multiplier/divider circuits. The multiplier/divider can operate under a 0.9 V supply voltage with a power consumption of 87 nW in a 0.35 mum AMS technology.