Title :
Two chip DSP implementation on gate array
Author :
Hamada, Osamu ; Kitazato, Naohisa ; Nakagami, T.
Author_Institution :
Sony Corporation, Tokyo, Japan
Abstract :
Two types of general purpose digital signal processing LSIs have been developed. One is a processing chip that includes a 28-bit ALU, a microprogram sequencer and peripheral interface circuits. Another is a 32 × 16 bit parallel multiplier chip. Combined with external static memory chips, these LSIs can execute operations at a rate of eight million instructions per second.
Keywords :
Algorithms; Application software; Circuits; Digital signal processing; Digital signal processing chips; Packaging; Random access memory; Read-write memory; Signal processing; Throughput;
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '86.
DOI :
10.1109/ICASSP.1986.1168629
