DocumentCode :
2999016
Title :
Symbolic macro test for DSP systems applied to a voice coder application
Author :
Steensma, Johannes ; Vanhoof, Bart ; Cathoor, F. ; Man, HugoDe
Author_Institution :
IMEC, Leuven, Belgium
fYear :
1993
fDate :
20-22 Oct 1993
Firstpage :
215
Lastpage :
223
Abstract :
The authors present a hierarchical symbolic macro test approach for heterogeneous systems applied to a complex voice coder application. This design has been generated with the Cathedral high-level synthesis environment and obeys the Macro design and test concept. The proposed test approach starts by generating the test set for all the primitive macro´s (PLAs, ROMs, RAMs, data path building blocks, multi-level logic FSMs) using dedicated test generation tools. Then these test sets are assembled at the data path and system level using our new symbolic macro test method to obtain a test program for the whole voice coder chip. The method efficiently supports partial scan, reconvergent paths, varying word lengths of connections and test compaction
Keywords :
automatic test software; design for testability; high level synthesis; logic testing; speech coding; vocoders; ATPG; Cathedral high-level synthesis; DSP systems; Macro design and test concept; PLAs; RAMs; ROMs; VLSI; complex voice coder; connections; data path building blocks; dedicated test generation tools; hierarchical symbolic macro test; multilevel logic FSM; partial scan; reconvergent paths; test compaction; varying word lengths; Automatic test pattern generation; Automatic testing; Control systems; Digital signal processing; Hardware; Libraries; Logic testing; Read only memory; System testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Signal Processing, VI, 1993., [Workshop on]
Conference_Location :
Veldhoven
Print_ISBN :
0-7803-0996-0
Type :
conf
DOI :
10.1109/VLSISP.1993.404485
Filename :
404485
Link To Document :
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