A 20-Stage CMOS Distributed Amplifier using CMOS Interconnects for Artificial Transmission Lines

This paper presents an area-efficient 20-stage distributed amplifier implemented in 0.18 mum CMOS process. To implement the artificial transmission line of the distributed amplifier, single-wire CMOS interconnects are employed instead of conventional on-chip spiral inductors. Based on this technique the area of CMOS DA is minimized to 0.4 mm². Implemented DA exhibits a gain of 9 dB and a unity gain bandwidth of 27 GHz. Input and output return losses are less than 12 and 8 dB, respectively.